Kingston Server Premier - DDR4 - Module - 8 GB
1Rx8 - 1G x 72-Bit - PC4-2666 - CL19 - DIMM 288-PIN - 2666 MHz / PC4-21300 - CL19 - 1.2 V - registered parity - ECC
Brand: Kingston
SKU: KSM26RS8/8HDI
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NOTE: The information below is provided for your convenience only; the accuracy of the specifications cannot be guaranteed. However, if necessary, please check with us before purchasing. Data provided by 1 World Sync.
General
Component for
PC/Server
Internal memory
8 GB
Memory layout (modules x size)
1 x 8 GB
Internal memory type
DDR4
Memory clock speed
2666 MHz
Memory form factor
288-pin DIMM
CAS latency
19
ECC
Y
Kingston Technology KSM26RS8/8HDI. Component for: PC/Server, Internal memory: 8 GB, Memory layout (modules x size): 1 x 8 GB, Internal memory type: DDR4, Memory clock speed: 2666 MHz, Memory form factor: 288-pin DIMM, CAS latency : 19, ECC
| Estimate Gross Weight | 0.025 |
|---|
https://www.kingston.com/en/memory/search?partId=KSM26RS8%2F8HDI
Kingston's KSM26RS8/8HDI is a 1G x 72-bit (8GB) DDR4-2666 CL19 SDRAM (Synchronous DRAM) registered w/ parity, 1Rx8, ECC, memory module, based on nine 1G x 8-bit FBGA components. The SPD is programmed to JEDEC standard latency DDR4-2666 timing of 19-19-19 at 1.2V. Each 288-pin DIMM uses gold contact fingers.
Kingston's KSM26RS8/8HDI is a 1G x 72-bit (8GB) DDR4-2666 CL19 SDRAM (Synchronous DRAM) registered w/ parity, 1Rx8, ECC, memory module, based on nine 1G x 8-bit FBGA components. The SPD is programmed to JEDEC standard latency DDR4-2666 timing of 19-19-19 at 1.2V. Each 288-pin DIMM uses gold contact fingers.
- Functionality and operations comply with the DDR4 SDRAM datasheet
- Internal Vref DQ level generation is available
- Write CRC is supported at all speed grades
- CA parity (Command/Address Parity) mode is supported
- 16 internal banks
- Bi-Directional Differential Data Strobe
- 8 bit pre-fetch
- Supports ECC error correction and detection
- On-Die Termination (ODT)
- Temperature sensor with integrated SPD
- This product is in compliance with the RoHS directive
- Per DRAM Addressability is supported
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